Senior PLL and Clock Distribution Expert (startup)

Senior Analog/Mixed-Signal IC Design Engineer (startup)

Chip-Level Design Verification Engineer

Chip-Level Design Verification Engineer

Chip-Level Design Verification Engineer

Corporate Case Assistant - Palo Alto, CA - Hybrid

Trademark Prosecution Paralegal - Hybrid

IT Help Desk Analyst (onsight) - Cerritos, CA

Legal Secretary - Litigation

Trademark Paralegal - San Francisco, CA

Trademark Prosecution Paralegal-Hybrid

Trademark Prosecution Paralegal-Hybrid

Revenue Coordinator - San Francisco - Hybrid

Quality Manager - Tustin, CA

Legal Secretary – San Francisco - Hybrid

Corporate Paralegal - Hybrid

Trademark Paralegal - San Francisco, CA - Mainly Remote

Audit Letter Coordinator - Hybrid

Audit Letter Analyst – ($75k to $97k) - Hybrid

IP Patent Paralegal - Hybrid - Need a "Rock Star"

IP Patent Paralegal - Hybrid - Need a "Rock Star"

eBilling Supervisor - Hybrid

Litigation Paralegal – Hybrid - $75k to $95k

Director of Practice Operations – Intellectual Property & Real Estate

Litigation Paralegal - Boston

Specification Writer for Advanced Integrated Circuits

Senior Physical Design Engineer - Place & Route Expert

Senior Digital IC Design Engineer

Senior Design Verification Engineer

Semiconductor Test Technician

Semiconductor Test Manager & Managing Director

Semiconductor Test Engineer

Physical Design Engineer

IT Manager

Litigation Paralegal - Hybrid

Senior/Lead Asynchronous SRAM Design Engineer (remote)

Senior/Lead Asynchronous SRAM Design Engineer

Senior Physical Design Engineer (Cadence tools expert)

Senior IC Layout Design Engineer

ASIC Design Manager

Trademark Prosecution Paralegal - Hybrid