Senior Analog/Mixed-Signal IC Design Engineer 
San Diego, CA (onsite/hybrid)
US Citizen or US Permanent Resident (preferred)
Full-Time + Health Benefits + 401K Plan + PTO + Stock Option Plan

Requirements:
• High-speed time-interleaved ADCs (SAR, pipeline, TDC, etc.), RF front-end design, SerDes, miscellaneous functions (other data converters, filters, amplifiers, PLLs, power management, oscillators, etc.) in FinFET technologies.
• MS with 5+ years or PhD with 3+ years of experience preferred.
• Strong PLL and clock distribution experience is preferred

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Javier Leon
619-227-3193 cell
FJLrecruiter@gmail.com
www.LinkedIn.com/in/JavierLeon (are we connected?)