CMP Semiconductor Process Engineer – San Diego, CA

Location: Carlsbad,, CA
Date Posted: 05-31-2017

CMP Semiconductor Process Engineer – San Diego, CA

Job Description:
The Semiconductor Process Engineer – CMP Focus will be responsible for sustaining and developing semiconductor planarization processes and associated equipment for glass, sapphire, compound semiconductor and silicon-based wafer processing.  This individual will be responsible for support of chemi-mechanical polishing (CMP) and wafer scrubbing processes within the company's Nanotechnology Lab.  He or she will work closely with the Planarization Module Engineer to improve planarization of oxide, nitride, metal, and semiconductor surfaces in support of the demonstration of the innovative microdisplay development.
This engineer must understand state-of-the-art polishing and wafer cleaning tools, consumables, chemistries, and metrology methods; be able to apply them to novel surfaces and structures; and work closely with the team’s engineers and technicians to ensure successful downstream processing and ultimately high device yield.  This position includes sustained hands-on development and process characterization responsibilities in the clean room processing environment.  The successful candidate will be an essential team member and bring novel semiconductor photonic technology designs from early R&D stages through to production and application.

Education Requirements:
Minimum of Bachelor’s Degree in Materials Science, Chemical Engineering, Chemistry, or related field. Advanced degree preferred.

Skills /Experience Requirements:
- Minimum two years experience of semiconductor wafer processing with an emphasis on CMP and other planarization techniques
- Understand the behavior of CMP slurries and pads/consumables is critical
- Experience with grinding and lapping media, tools, and processes is beneficial
- Have extensive expertise in metrology tools that are related to planarization processes, including but not limited to wafer shape measurement tools, thin film measurement tools, electron microscopes with energy dispersive x-ray spectroscopy, and atomic force microscopes
- Understand planarization tools and be able to identify and mitigate sources of tool/process drift
- Understand wafer scrubbing and cleaning tools and technologies and the influence the chemicals and tools have on materials processed at semiconductor lab.
- Be familiar with DOE design, data interpretation, statistical process control, and yield improvement methods
- Be able to develop new processes independently, as well as in collaboration with other engineers and technicians
- Strong English verbal, written, and electronic communication skills
- Strong computer skills, including office software and data analysis software
- This role requires the candidate to occasionally lift up to 100 lbs

To Apply: Please email you resume for immediate consideration to:
Craig Fleck
Vice President
Chelsea Search Group
3050 Rue D'Orleans #317
San Diego, CA 92110
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