ASIC Design Verification Engineer
US Citizen or US Permanent Resident
Full-Time + Health Benefits + 401K Plan with profit sharing + PTO + Stock Option Plan

Requirements:
• BS/MS in Electrical and Electronic Engineering, Computer Science, or equivalent.
• 7+ years of direct industry experience with ASIC and/or SoC design.
• Strong working knowledge of object-oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills.
• A strong background in RTL based digital IC design using Verilog/SystemVerilog.
• Proven track record of first-pass successes.
• Self-starter with the ability to assume leadership roles.
• Ability to work well in a diverse team environment.
• Willingness to mentor junior engineers.
• Experience with industry standard development tools and methodologies.

DESIGN VERIFICATION GROUP on LinkedIn: https://www.linkedin.com/groups/3989573/
 

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Javier Leon
Talent Acquisition
Chelsea Search Group
619-227-3193 cell
FJLrecruiter@gmail.com
www.LinkedIn.com/in/JavierLeon (are we connected?)