RF Layout Design Engineer
Full-time + Benefits
Richardson, Texas (onsite/hybrid)
US Citizen or US Permanent Resident

Required Experience:
• 5 years of industry Experience
• FinFET experience
• High proficiency in interpreting CALIBRE DRC, ERC, and LVS
• Proficient with CADENCE layout tools
• Strong background in custom RF/analog layout for transceivers and deep sub-micron CMOS technologies

Preferred Experience:
• Experience with advanced nodes (7nm and below)
• Knowledge of guard rings, DNW, PN junctions, and advanced process effects (LOD, WPE, etc.)
• Skilled in layout techniques for device matching, parasitic reduction, RF shielding, and high-frequency routing
• Solid understanding of RC delay, electromigration, and signal coupling
• Strong communication skills and ability to collaborate with designers and layout teams


IC MASK LAYOUT DESIGN GROUP on LinkedIn: https://www.linkedin.com/groups/13537705/

---
Javier Leon
619-227-3193 cell
FJLrecruiter@gmail.com
www.LinkedIn.com/in/JavierLeon (are we connected?)