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Senior ASIC Design Engineer (remote)

San Jose, CA
Senior ASIC Design Engineer
Must be a US Citizen
Remote / work from any US location
Full-Time + Health Benefits + 401K Plan with profit sharing + PTO + Stock Option Plan

Essential Duties and Qualifications:
• Use delivered vendor IP and integrate that design into the current architecture
• Optimize RTL code for area, power, and performance.
• Implement and verify complex digital blocks.
• Work with verification engineers to ensure functional correctness.
• Assist in creating testbenches and verifying the chip’s functionality.

Required Skills & Experience:
• Strong background in RTL based digital IC design using Verilog/SystemVerilog
• Willingness to mentor engineers.
• BSEE/MSEE with 7+ years of direct industry experience with ASIC and/or SoC design
• Experience with industry standard interfaces such as PCIe, DDR4+ and Gigabit Ethernet (GbE)
• Proficiency in Synopsys Design Compiler and other EDA tools
• Strong understanding of digital design principles
• Familiarity with RISC architectures (e.g., ARM, MIPS)
• Excellent problem-solving skills and attention to detail
• Proven track record of first-pass successes
• Self-starter with the ability to assume leadership roles
• Ability to work well in a diverse team environment
• Experience with industry standard development tools and methodologies


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Javier Leon
619-227-3193 cell
FJLrecruiter@gmail.com
www.LinkedIn.com/in/JavierLeon (are we connected?)
 

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