Senior Physical Design Engineer
Austin, Texas (onsite/hybrid)
US Citizen or US Permanent Resident
6-12 months contract with possible extensions

Job Description:
• 7+ years of relevant experience in place and route
• Able to handle top level, sub system level and block level timing analysis and fixes
• Expert in TCL or Python scripting
• For lead position, must have experience in leading & managing teams from different GEO’s.

Requirements:
Signoff: Years experience in Static-IR/Dynamic-IR/Power-EM/Signal-EM, Analysis using RHSC good IR Analysis using RH

Implementation: Synthesis, CDC (clock domain crossing) concepts and analysis, Industry standard tools like Design compiler/Genus, ICC2/Fusion Compiler/Innovus, Familiarity with netlist verification – CLP (low power checks), design checks, linting checks etc.

STA: Good timing concepts, Good understanding of StarRC/PrimeTime or QRC/Tempus tool, Ability to understand timing reports, Analyze and identify timing bottlenecks, Exposure in timing closure flow.

Must have tapedout multiple projects and closed complete signoff. Familiar to Vector/Vectorless flow using Redhawk SC tool. Help Block IR closure as well.
 

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Javier Leon
619-227-3193 cell
FJLrecruiter@gmail.com
www.LinkedIn.com/in/JavierLeon (are we connected?)